Hi Labcenter team
This is bug report please move it if this is the wrong place
The 2 issues I have are both related to the VSM model for the 18f27Q10
The first is when an LOW interrupt is generated and I have High and low level interrupts enabled the VSM jumps correctly to the Low level entry point, my code then disables all interrupts INTCONbits_GIE = 0, then it saves a few regs and then enables interrupts again so that if a High Level interrupt occurs it is able to service it.
The issue is that as soon as the Global interrupts are enabled again it just jumps right to the low level interrupt entry point. Just making a never ending loop (It might crash the stack but do not care)
Its almost as if it does not understand it has dual level interrupt handling. Works fine with older 18F series pics
The second issue is the ADC conversion
I have code that reads AN0 and in real life its fine I can tx out the changing value with no issues
In the VSM it just returns 1023 even if the port is tied to ground.
Thanks
Tim
Sorry a few more issues...(PIC18F27Q10)
Re: Sorry a few more issues...(PIC18F27Q10)
From tests we made for such the PIC18 family it appears there are not bugs with interrupts (falling and rising edges) and adc conversion in the condition we have tested. So, unfortunately, I cannot reproduce the same issues.
If you want us to investigate please take the time to attach a couple of simple tests. Ideally those tests should be made of a few lines that hightlight the problem, if any. Better is when your tests are assembler or C, as we didn't use Positron to test the device.
If you want us to investigate please take the time to attach a couple of simple tests. Ideally those tests should be made of a few lines that hightlight the problem, if any. Better is when your tests are assembler or C, as we didn't use Positron to test the device.
Kind regards,
Ettore Arena - Labcenter Electronics.
Ettore Arena - Labcenter Electronics.
Re: Sorry a few more issues...(PIC18F27Q10)
There as I said no issues with the Generic 18F series. What I have found is the bugs with the 18f27Q10.
Remember that in "REAL LIFE" everything runs fine. it is the VSM that is not.
The outstanding issues I have are:-
1 There is some issue with an instruction or something that means a delay of even 2 seconds is not simulated and is stepped over in a us
2 2 Stage interrupts are not being handled properly
3 ADC conversion at least on AN0 is not being simulated
I do not have a C compiler but I will write the code so clearly it can be converted in a few mins. I will also show an animation of it failing with the interrupt.
Tim
Remember that in "REAL LIFE" everything runs fine. it is the VSM that is not.
The outstanding issues I have are:-
1 There is some issue with an instruction or something that means a delay of even 2 seconds is not simulated and is stepped over in a us
2 2 Stage interrupts are not being handled properly
3 ADC conversion at least on AN0 is not being simulated
I do not have a C compiler but I will write the code so clearly it can be converted in a few mins. I will also show an animation of it failing with the interrupt.
Tim
Re: Sorry a few more issues...(PIC18F27Q10)
I meant PIC18xxFQ10 family, not Generic 18F series. This is one of the ADC tests showing it working.
About interrupts I'm not sure what you mean with "2 Stage" ?
Kind regards,
Ettore Arena - Labcenter Electronics.
Ettore Arena - Labcenter Electronics.
Re: Sorry a few more issues...(PIC18F27Q10)
This is the first of the examples its should be simple to reproduce in C
It shows a delay of 100ms
The counter timer does not move stepping through the loop with it in
The Project file can be used for all the future examples
It shows a delay of 100ms
The counter timer does not move stepping through the loop with it in
The Project file can be used for all the future examples
Code: Select all
Device 18F27Q10
'-------------------------------------------------------------------------------
'**** Added by Fuse Configurator ****
' Use the Fuses Tab to change these settings
Config_Start
FEXTOSC = OFF ;Oscillator not enable
RSTOSC = HFINTOSC_64MHZ ;HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:
CLKOUTEN = OFF ;CLKOUT function is disable
CSWEN = ON ;Writing to NOSC and NDIV is allowed
FCMEN = ON ;Fail-Safe Clock Monitor enable
MCLRE = EXTMCLR ;MCLR pin (RE3) is MCL
PWRTE = ON ;Power up timer is on
LPBOREN = OFF ;Low power BOR is disable
BOREN = SBORDIS ;Brown-out Reset enabled , SBOREN bit is ignore
BORV = VBOR_190 ;Brown-out Reset Voltage (VBOR) set to 1.90
ZCD = OFF ;ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCO
PPS1WAY = ON ;PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycl
STVREN = ON ;Stack full/underflow will cause Rese
XINST = OFF ;Extended Instruction Set and Indexed Addressing Mode disable
WDTCPS = WDTCPS_31 ;Divider ratio 1:65536; software control of WDTP
WDTE = OFF ;WDT Disable
WDTCWS = WDTCWS_7 ;window always open (100%); software control; keyed access not require
WDTCCS = SC ;Software Contro
WRT0 = OFF ;Block 0 (000800-003FFFh) not write-protecte
WRT1 = OFF ;Block 1 (004000-007FFFh) not write-protecte
WRT2 = OFF ;Block 2 (008000-00BFFFh) not write-protecte
WRT3 = OFF ;Block 3 (00C000-00FFFFh) not write-protecte
WRT4 = OFF ;Block 4 (010000-013FFFh) not write-protecte
WRT5 = OFF ;Block 5 (014000-017FFFh) not write-protecte
WRT6 = OFF ;Block 6 (018000-01BFFFh) not write-protecte
WRT7 = OFF ;Block 7 (01C000-01FFFFh) not write-protecte
WRTC = OFF ;Configuration registers (300000-30000Bh) not write-protecte
WRTB = OFF ;Boot Block (000000-0007FFh) not write-protecte
WRTD = OFF ;Data EEPROM not write-protecte
SCANE = ON ;Scanner module is available for use, SCANMD bit can control the modul
LVP = ON ;Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignore
CP = OFF ;UserNVM code protection disable
CPD = OFF ;DataNVM code protection disable
EBTR0 = OFF ;Block 0 (000800-003FFFh) not protected from table reads executed in other block
EBTR1 = OFF ;Block 1 (004000-007FFFh) not protected from table reads executed in other block
EBTR2 = OFF ;Block 2 (008000-00BFFFh) not protected from table reads executed in other block
EBTR3 = OFF ;Block 3 (00C000-00FFFFh) not protected from table reads executed in other block
EBTR4 = OFF ;Block 4 (010000-013FFFh) not protected from table reads executed in other block
EBTR5 = OFF ;Block 5 (014000-017FFFh) not protected from table reads executed in other block
EBTR6 = OFF ;Block 6 (018000-01BFFFh) not protected from table reads executed in other block
EBTR7 = OFF ;Block 7 (01C000-01FFFFh) not protected from table reads executed in other block
EBTRB = OFF ;Boot Block (000000-0007FFh) not protected from table reads executed in other block
Config_End
'**** End of Fuse Configurator Settings ****
'-------------------------------------------------------------------------------
Xtal 64
;**** Compiler Defs *****
Declare Create_Coff On
'------------------------------------------------------------------------------------
' Setup the internal oscillator to operate at 64MHz
' Input : None
' Output : None
' Notes : None
''
Proc Osc_64MHz()
OSCCON1 = $60 ' NOSC HFINTOSC, NDIV 1
OSCCON3 = $00 ' CSWHOLD may proceed, SOSCPWR Low power
OSCEN = $00 ' MFOEN disabled, LFOEN disabled, ADOEN disabled, SOSCEN disabled, EXTOEN disabled, HFOEN disabled
OSCFRQ = $08 ' HFFRQ 64_MHz
OSCTUNE = $00
EndProc
Start:
Osc_64MHz()
While 1 = 1 ' Make a loop
Delayus 100
Wend
- Attachments
-
- Pic18F27Q10 tests.pdsprj
- (14.76 KiB) Downloaded 1454 times
Re: Sorry a few more issues...(PIC18F27Q10)
This is example 2 the ADC conversion
I note that in your example you have automatic conversion running with is generating an interrupt. I also notice there seems to be no conversion timing set up. I used in my code (not here) MCC Classic to generate all the ADC code to set up the ADC conversion
I stripped out all that to replicate just the ADC stuff as per your example
The result is always 0 in the result regs
I note that in your example you have automatic conversion running with is generating an interrupt. I also notice there seems to be no conversion timing set up. I used in my code (not here) MCC Classic to generate all the ADC code to set up the ADC conversion
I stripped out all that to replicate just the ADC stuff as per your example
The result is always 0 in the result regs
Code: Select all
Device 18F27Q10
'-------------------------------------------------------------------------------
'**** Added by Fuse Configurator ****
' Use the Fuses Tab to change these settings
Config_Start
FEXTOSC = OFF ;Oscillator not enable
RSTOSC = HFINTOSC_64MHZ ;HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:
CLKOUTEN = OFF ;CLKOUT function is disable
CSWEN = ON ;Writing to NOSC and NDIV is allowed
FCMEN = ON ;Fail-Safe Clock Monitor enable
MCLRE = EXTMCLR ;MCLR pin (RE3) is MCL
PWRTE = ON ;Power up timer is on
LPBOREN = OFF ;Low power BOR is disable
BOREN = SBORDIS ;Brown-out Reset enabled , SBOREN bit is ignore
BORV = VBOR_190 ;Brown-out Reset Voltage (VBOR) set to 1.90
ZCD = OFF ;ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCO
PPS1WAY = ON ;PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycl
STVREN = ON ;Stack full/underflow will cause Rese
XINST = OFF ;Extended Instruction Set and Indexed Addressing Mode disable
WDTCPS = WDTCPS_31 ;Divider ratio 1:65536; software control of WDTP
WDTE = OFF ;WDT Disable
WDTCWS = WDTCWS_7 ;window always open (100%); software control; keyed access not require
WDTCCS = SC ;Software Contro
WRT0 = OFF ;Block 0 (000800-003FFFh) not write-protecte
WRT1 = OFF ;Block 1 (004000-007FFFh) not write-protecte
WRT2 = OFF ;Block 2 (008000-00BFFFh) not write-protecte
WRT3 = OFF ;Block 3 (00C000-00FFFFh) not write-protecte
WRT4 = OFF ;Block 4 (010000-013FFFh) not write-protecte
WRT5 = OFF ;Block 5 (014000-017FFFh) not write-protecte
WRT6 = OFF ;Block 6 (018000-01BFFFh) not write-protecte
WRT7 = OFF ;Block 7 (01C000-01FFFFh) not write-protecte
WRTC = OFF ;Configuration registers (300000-30000Bh) not write-protecte
WRTB = OFF ;Boot Block (000000-0007FFh) not write-protecte
WRTD = OFF ;Data EEPROM not write-protecte
SCANE = ON ;Scanner module is available for use, SCANMD bit can control the modul
LVP = ON ;Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignore
CP = OFF ;UserNVM code protection disable
CPD = OFF ;DataNVM code protection disable
EBTR0 = OFF ;Block 0 (000800-003FFFh) not protected from table reads executed in other block
EBTR1 = OFF ;Block 1 (004000-007FFFh) not protected from table reads executed in other block
EBTR2 = OFF ;Block 2 (008000-00BFFFh) not protected from table reads executed in other block
EBTR3 = OFF ;Block 3 (00C000-00FFFFh) not protected from table reads executed in other block
EBTR4 = OFF ;Block 4 (010000-013FFFh) not protected from table reads executed in other block
EBTR5 = OFF ;Block 5 (014000-017FFFh) not protected from table reads executed in other block
EBTR6 = OFF ;Block 6 (018000-01BFFFh) not protected from table reads executed in other block
EBTR7 = OFF ;Block 7 (01C000-01FFFFh) not protected from table reads executed in other block
EBTRB = OFF ;Boot Block (000000-0007FFh) not protected from table reads executed in other block
Config_End
'**** End of Fuse Configurator Settings ****
'-------------------------------------------------------------------------------
Xtal 64
Declare Create_Coff On
'------------------------------------------------------------------------------------
' Setup the internal oscillator to operate at 64MHz
' Input : None
' Output : None
' Notes : None
''
Proc Osc_64MHz()
OSCCON1 = $60 ' NOSC HFINTOSC, NDIV 1
OSCCON3 = $00 ' CSWHOLD may proceed, SOSCPWR Low power
OSCEN = $00 ' MFOEN disabled, LFOEN disabled, ADOEN disabled, SOSCEN disabled, EXTOEN disabled, HFOEN disabled
OSCFRQ = $08 ' HFFRQ 64_MHz
OSCTUNE = $00
EndProc
Start:
Dim WadcResult as word
Osc_64MHz()
'// Setup ADC
ADCON0 = 0x00; // Clear ADCON0 so it is OFF
ADCON0bits_ADCONT = 0; // NOT Continuous mode
'// Start
ADPCH = 0x0; // Select AN0 as the ADC channel
ADCON0bits_ADON = 1; // Enable ADC
While 1 = 1
ADCON0bits_ADGO = 1; // Start a conversion
While ADCON0bits_ADGO = 1; // Loop until the conversion is done
Nop
Wend
WadcResult.byte0 = ADRESL
WadcResult.byte1 = ADRESH
Wend
Re: Sorry a few more issues...(PIC18F27Q10)
This example is more complex
I set up 2 level interrupts
High Level is the USART1 buffer being empty
Low Level is TMR0 rolling over
The Context save and interrupt in asm can be seen in the gif but here it is as well,
I also include a gif of what I see stepping through in asm view mode BTW this is all that happens there are not other steps it takes just goes round and round
Sorry its a link I cannot get it to upload
https://photos.app.goo.gl/65RqPPBWs5PCskyh7
I set up 2 level interrupts
High Level is the USART1 buffer being empty
Low Level is TMR0 rolling over
The Context save and interrupt in asm can be seen in the gif but here it is as well,
Code: Select all
; LOW PRIORITY INTERRUPT HANDLER
LowLevelInterrupts
movlb 0
F1_000084 equ $ ; in [INTERRUPT TEST PIC1827Q10.BAS] Context Save
bcf INTCON,7,0
movff BSR,_Low__Context_Store_0
movff STATUS,_Low__Context_Store_1
movff WREG,_Low__Context_Store_2
bsf INTCON,7,0
F1_000086 equ $ ; in [INTERRUPT TEST PIC1827Q10.BAS] PIR3.4 = 0
movlb 14
bcf PIR3,4,1
F1_000087 equ $ ; in [INTERRUPT TEST PIC1827Q10.BAS] wrTimer1 = cTimer1_ms_Reload
movlw 193
movwf TMR1LH,0
movlw 140
movwf TMR1L,0
F1_000089 equ $ ; in [INTERRUPT TEST PIC1827Q10.BAS] Context Restore
bcf INTCON,7,0
movff _Low__Context_Store_0,BSR
movff _Low__Context_Store_1,STATUS
movff _Low__Context_Store_2,WREG
bsf INTCON,7,0
retfie
Sorry its a link I cannot get it to upload
https://photos.app.goo.gl/65RqPPBWs5PCskyh7
Code: Select all
Device 18F27Q10
'-------------------------------------------------------------------------------
'**** Added by Fuse Configurator ****
' Use the Fuses Tab to change these settings
Config_Start
FEXTOSC = OFF ;Oscillator not enable
RSTOSC = HFINTOSC_64MHZ ;HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:
CLKOUTEN = OFF ;CLKOUT function is disable
CSWEN = ON ;Writing to NOSC and NDIV is allowed
FCMEN = ON ;Fail-Safe Clock Monitor enable
MCLRE = EXTMCLR ;MCLR pin (RE3) is MCL
PWRTE = ON ;Power up timer is on
LPBOREN = OFF ;Low power BOR is disable
BOREN = SBORDIS ;Brown-out Reset enabled , SBOREN bit is ignore
BORV = VBOR_190 ;Brown-out Reset Voltage (VBOR) set to 1.90
ZCD = OFF ;ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCO
PPS1WAY = ON ;PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycl
STVREN = ON ;Stack full/underflow will cause Rese
XINST = OFF ;Extended Instruction Set and Indexed Addressing Mode disable
WDTCPS = WDTCPS_31 ;Divider ratio 1:65536; software control of WDTP
WDTE = OFF ;WDT Disable
WDTCWS = WDTCWS_7 ;window always open (100%); software control; keyed access not require
WDTCCS = SC ;Software Contro
WRT0 = OFF ;Block 0 (000800-003FFFh) not write-protecte
WRT1 = OFF ;Block 1 (004000-007FFFh) not write-protecte
WRT2 = OFF ;Block 2 (008000-00BFFFh) not write-protecte
WRT3 = OFF ;Block 3 (00C000-00FFFFh) not write-protecte
WRT4 = OFF ;Block 4 (010000-013FFFh) not write-protecte
WRT5 = OFF ;Block 5 (014000-017FFFh) not write-protecte
WRT6 = OFF ;Block 6 (018000-01BFFFh) not write-protecte
WRT7 = OFF ;Block 7 (01C000-01FFFFh) not write-protecte
WRTC = OFF ;Configuration registers (300000-30000Bh) not write-protecte
WRTB = OFF ;Boot Block (000000-0007FFh) not write-protecte
WRTD = OFF ;Data EEPROM not write-protecte
SCANE = ON ;Scanner module is available for use, SCANMD bit can control the modul
LVP = ON ;Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignore
CP = OFF ;UserNVM code protection disable
CPD = OFF ;DataNVM code protection disable
EBTR0 = OFF ;Block 0 (000800-003FFFh) not protected from table reads executed in other block
EBTR1 = OFF ;Block 1 (004000-007FFFh) not protected from table reads executed in other block
EBTR2 = OFF ;Block 2 (008000-00BFFFh) not protected from table reads executed in other block
EBTR3 = OFF ;Block 3 (00C000-00FFFFh) not protected from table reads executed in other block
EBTR4 = OFF ;Block 4 (010000-013FFFh) not protected from table reads executed in other block
EBTR5 = OFF ;Block 5 (014000-017FFFh) not protected from table reads executed in other block
EBTR6 = OFF ;Block 6 (018000-01BFFFh) not protected from table reads executed in other block
EBTR7 = OFF ;Block 7 (01C000-01FFFFh) not protected from table reads executed in other block
EBTRB = OFF ;Boot Block (000000-0007FFh) not protected from table reads executed in other block
Config_End
'**** End of Fuse Configurator Settings ****
'-------------------------------------------------------------------------------
Xtal 64
;**** Compiler Defs *****
Declare Create_Coff On
On_Interrupt GoTo HighLevelInterrupts
On_Low_Interrupt GoTo LowLevelInterrupts
'------------------------------------------------------------------------------------
Goto Start
HighLevelInterrupts: ' Usart buffer empty
Context Save
PIR3bits_TXIF = 0
Context Restore
Nop
Nop ; These are here to see where the code is running
Nop
LowLevelInterrupts: ' Timer interrupt
Context Save
PIR3bits_TXIF = 0
wrTimer1 = cTimer1_ms_Reload
Context Restore
' Setup the internal oscillator to operate at 64MHz
' Input : None
' Output : None
' Notes : None
''
Proc Osc_64MHz()
OSCCON1 = $60 ' NOSC HFINTOSC, NDIV 1
OSCCON3 = $00 ' CSWHOLD may proceed, SOSCPWR Low power
OSCEN = $00 ' MFOEN disabled, LFOEN disabled, ADOEN disabled, SOSCEN disabled, EXTOEN disabled, HFOEN disabled
OSCFRQ = $08 ' HFFRQ 64_MHz
OSCTUNE = $00
EndProc
;--------------------------------------------------------------------------------------------------------------
; Interrupt timer stuff
Dim wrTimer1 As TMR1L.Word
Dim cTimer1_ms_Reload As 49548
'------------------------------------------------------------------------------------
' Sets up Timer 1
' Input : None
' Output : None
' Notes : None
''
'Timer1
'Prescaler 1:1' TMR1 Preload = 49536' Actual Interrupt Time : 1 ms
Proc Timer_Init()
T1CON = %00000000 ' No prescalers
TMR1CLK = $01 '
wrTimer1 = cTimer1_ms_Reload
T1CONBits_ON = 1
PIE4bits_TMR1IE = 1 ' Timer 1 interrupt enabled
IPR4bits_TMR1IP = 0 ' This interrupt is low priority
EndProc
Proc USART_Init()
' TX interrupt Initialisation
TX1STABits_TXEN = 1 ' Enable TX1
PIE3Bits_TX1IE = 0 ' Enable TX1 interrupts
IPR3Bits_TX1IP = 1 ' TX interrupts are high priority
EndProc
Start:
Osc_64MHz()
Timer_Init()
USART_Init()
IntconBits_IPEN = 1 ; Enable Priorty interrupts
IntconBits_PEIE = 1 ; Enable Peripheral Interrupts
IntconBits_GIE = 1 ; Enable General Interrupts
While 1 = 1
' Just loop
Nop
Wend
Re: Sorry a few more issues...(PIC18F27Q10)
Example 1 and 2 work both. The problem seems to be the PWRTE fuse ON.
This enables the Power-up Timer period that makes the mcu peripherals unresponsive for 64ms. Look at the table underleaf.
I didn't get the time to test the latest example.
Example files attached:
This enables the Power-up Timer period that makes the mcu peripherals unresponsive for 64ms. Look at the table underleaf.
I didn't get the time to test the latest example.
- Immagine 2023-03-29 234546.jpg (157.3 KiB) Viewed 2113 times
Kind regards,
Ettore Arena - Labcenter Electronics.
Ettore Arena - Labcenter Electronics.
Re: Sorry a few more issues...(PIC18F27Q10)
I will check out the test files
I will note that the VSM simulates the start up delay looking at the time it always starts around 65ms
The issue is that for the delay unless the VSM is being "broken" by the fuse setting you run the VSM for ages and the time advances but single step the dealy and there is no change on the timer tool.
Not sure how it would effect the ADC conversion but I need to look at the test files before I comment more.
Tim
I will note that the VSM simulates the start up delay looking at the time it always starts around 65ms
The issue is that for the delay unless the VSM is being "broken" by the fuse setting you run the VSM for ages and the time advances but single step the dealy and there is no change on the timer tool.
Not sure how it would effect the ADC conversion but I need to look at the test files before I comment more.
Tim
Re: Sorry a few more issues...(PIC18F27Q10)
I changed my fuse setting and now delays are functioning properly.
I also got the ADC conversion to work now, I note though that it takes a lot of cycles to change the result in some cases it took 1ms to rise and < 100us to fall. This may be correct but now I know its there.
The interrupt problem is persisting.
I also got the ADC conversion to work now, I note though that it takes a lot of cycles to change the result in some cases it took 1ms to rise and < 100us to fall. This may be correct but now I know its there.
The interrupt problem is persisting.
Re: Sorry a few more issues...(PIC18F27Q10)
Hi Tim,
About the interrupt issue, the following considerations are based to the source code you have attached.
There are several things in that code that are obscure to me. For example, you clear GIE/GIEH bit at the start of the interrupt routine when this is just cleared automatically from the hardware when an interrupt is responded to. Similarly, you set the GIE/GIEH bits in the software when this is set automatically on RETFIE instruction by the hardware.
Also, the reason why you clear the interrupt flag bit TXIF (PIR3) in both the interrupts service routines does not make sense to me. The documentation states clearly that TXxIF bit is read-only and cannot be set or cleared by software.
But more important, while you clear TXIF in the low level Timer 1 interrupt (which is read-only bit) you don't clear the TMR1IF timer 1 interrupt flag bit which is the reason as to why the Timer 1 interrupt is called recoursively. The documentation states that TMR1IF flag should be cleared in the interrupt routine. Otherwise (this has been verified in real hardware) the interrupt is called in a never ending loop.
I didn't test your code in other PIC18F generic devices, but I'm sure that it would behave the same, at least the code that you have posted here.
I attach the files I used for the test and my XC8 compiler conversion.
About the interrupt issue, the following considerations are based to the source code you have attached.
There are several things in that code that are obscure to me. For example, you clear GIE/GIEH bit at the start of the interrupt routine when this is just cleared automatically from the hardware when an interrupt is responded to. Similarly, you set the GIE/GIEH bits in the software when this is set automatically on RETFIE instruction by the hardware.
Also, the reason why you clear the interrupt flag bit TXIF (PIR3) in both the interrupts service routines does not make sense to me. The documentation states clearly that TXxIF bit is read-only and cannot be set or cleared by software.
- Immagine 2023-03-30 143409.jpg (76.81 KiB) Viewed 2087 times
But more important, while you clear TXIF in the low level Timer 1 interrupt (which is read-only bit) you don't clear the TMR1IF timer 1 interrupt flag bit which is the reason as to why the Timer 1 interrupt is called recoursively. The documentation states that TMR1IF flag should be cleared in the interrupt routine. Otherwise (this has been verified in real hardware) the interrupt is called in a never ending loop.
- Immagine 2023-03-30 143815.jpg (93.24 KiB) Viewed 2087 times
I attach the files I used for the test and my XC8 compiler conversion.
Kind regards,
Ettore Arena - Labcenter Electronics.
Ettore Arena - Labcenter Electronics.
Re: Sorry a few more issues...(PIC18F27Q10)
About the PWRTE fuse, yes, Proteus VSM models the effects of power-up timer for the 18FxxQ10 devices (like other generic PIC18F as well).
However the VSM simulation should hang the mcu in a reset state until the power-up timer period is elapsed. This means that you shouldn't be able to ste-by-step the code for 65ms simulated time. I will see whether this can be easily fixed or not.
However the VSM simulation should hang the mcu in a reset state until the power-up timer period is elapsed. This means that you shouldn't be able to ste-by-step the code for 65ms simulated time. I will see whether this can be easily fixed or not.
Kind regards,
Ettore Arena - Labcenter Electronics.
Ettore Arena - Labcenter Electronics.
Re: Sorry a few more issues...(PIC18F27Q10)
Just a short note to say that power-up timer issue when PWRTE is configured to ON has been fixed and scheduled for the next release or service pack.
Kind regards,
Ettore Arena - Labcenter Electronics.
Ettore Arena - Labcenter Electronics.
Re: Sorry a few more issues...(PIC18F27Q10)
ARGGGGG
Just lost mt post I will try again but it will very much shorter and not as well written
The compiler knows this and writes the interrupt handler to take care of it
BTW the forum would not accept the post with this text inline, just saying..
Note what the data sheet says on Retfi (s)
Operation: (TOS) → PC,
1 → GIE/GIEH or PEIE/GIEL,
if s = 1
(WS) → W,
(STATUSS) → Status,
(BSRS) → BSR
Just lost mt post I will try again but it will very much shorter and not as well written
On low level interrupt PEIE/GIEL, is cleared by the pic not GIE/GIEH, so if a high level interrupt occurs BSR etc will be messed with so the software has to save them and to do that safely it has to disable high level interrupts, When it has saved the regs it needs it resets GIE to let the system service the high level interrupt.There are several things in that code that are obscure to me. For example, you clear GIE/GIEH bit at the start of the interrupt routine when this is just cleared automatically from the hardware when an interrupt is responded to. Similarly, you set the GIE/GIEH bits in the software when this is set automatically on RETFIE instruction by the hardware.
The compiler knows this and writes the interrupt handler to take care of it
BTW the forum would not accept the post with this text inline, just saying..
- Interrupt code.png (47.1 KiB) Viewed 2036 times
Operation: (TOS) → PC,
1 → GIE/GIEH or PEIE/GIEL,
if s = 1
(WS) → W,
(STATUSS) → Status,
(BSRS) → BSR
- RETFI.png (87.63 KiB) Viewed 2035 times
Re: Sorry a few more issues...(PIC18F27Q10)
Some fixes affecting the interrupt logic and prioritized interrupts of Q10 & K40 families have been scheduled for the next service pack or release.
Kind regards,
Ettore Arena - Labcenter Electronics.
Ettore Arena - Labcenter Electronics.