Problem simulating multilevel design

[fennelly]

Hi

I am trying to create a simulation of a lookup table for demonstration.

I have created a multilevel file which has active inputs/outputs (logicstate, logictoggle & logicprobe) on both the root page and the child page. When I try to simulate only the child page seems to simulate.

I created a single level schematic & it simulates fine.

I created a multilevel design with all inputs brought to the top level through terminals. It simulates fine.

I would like to hide some of the detail in the lower circuit and still have it simulate properly.

Any ideas ?

[Ettore]

fennelly,

I'm not sure I can get on which it sumulates fine and which is not.
Why don't you send the project by e-mail for me to have a check.

[fennelly]

Hi Ettore,

My apologies for the delay in replying. I was away last week.

I turns out that there is a bug in the system when animating of hierarchical designs. See the message below which I received from David Spencer.

Regards,

FJF

>Hi,

>Having looked at the design and spoken to a colleague, there is >apparently a bug with the animation of hierarchical designs and logics.

>If you hit play on the lower sheet you will see that the simulation works >as you stated. If you stop the simulation, go to the parent sheet and hit >play, toggle a probe and enter the child sheet you will now find that the >animation does not work. What is happening is that the design is still >working however it is the visual changing of the circuit. If you were to >add a voltage probe you would see the changes.

>This is a bug which is on the list to fix.

>Kind regards,
>David Spencer - Labcenter Electronics