Two-deep buffer RCREG in USART debug

[picchiedi]

Hello.
I wonder if, during USART module application simulation debug, it's possible to see somewhere the real time contents of the 2-byte FIFO buffer and the RSR shift register during receive operation.

Thank you for any suggestion.

Regards

[Ettore]

Two-character input buffer and Receive Shift Register are internal registers so they are not available in the Watch window.

However you may get further information if you use the diagnostic messages. Go to Debug->Configure Diagnostic, choose the PIC device in the Trace Categories window, select USART Module and finally enable Full Trace in the Trace Information Level.

This gives you some information about RSR, RCREG[0] and RCREG[1].

An example of diagnostic thread in the simulation log is depicted to follow:

Immagine 2022-05-09 110300.jpg (455.72 KiB) Viewed 9750 times

[picchiedi]

Thanks a lot, Ettore.
That's exactly what I meant.

Furthermore, as you talk of "internal", I looked at "Internal model data" window, during debug, and I found what enclosed.

I guess that at 00C9 and 00CA are also located and visible the Buffer values, aren't they?
In this example I was receiving 123<CR>, and 31 and 32 are the ASCII values for the first 2 byte.

Thanks again.

Regards

Internal model.JPG (84.41 KiB) Viewed 9740 times

[Ettore]

No, they aren't. Internal register means not allocated in the data memory.

[picchiedi]

mmh... , Ettore, I know that internal register are not allocated in data memory, but if you look at the enclosed, the values highlighted in Internal Model Data 00C9 and 00CA(31 and 32) during debug of the transmission of 12 sequence, are the same of the log, and happen to be highlighted when the log says that they are stored in FIFO buffer 0 and 1...

So my feeling is that they are also the FIFO buffer values.

Regards

FIFO buffer.JPG (271.15 KiB) Viewed 9728 times

[Ettore]

Data memory location to 0xC9 and 0xCA are usually in the general purpose register space area to bank 2. This is the space area used by compiler to allocate your program variables. Which PIC16 variant are you working with ?

[picchiedi]

PIC16F876A.

But Ettore, it's OK, it was just a curiosity.
A way also to understand what Intenal Model data window is for.

The log with USART diagnosy you taught me is much better, since it is has also time sequence during RSR completion.

Thank you so much.

Regards

[Ettore]

PIC16F876A.

OK, then I do (obviously) confirm what I have told you before; the two locations you were talking of are in the 80 bytes General Purpose Register area in Bank 2. So they are variables of your program that are loaded with the data to be transmitted to or received from, but not the internal FIFO in the strict sense; just a copy of the FIFO contents when it has been completely shifted out or in. Following the register file map:

Immagine 2022-05-09 204154.jpg (150.06 KiB) Viewed 9714 times

[picchiedi]

That's now clear to me, Ettore.
I came to the same conclusion thinking about it in the latest hours.
Probably, I still have to check, the explanation is in the Proton basic compiler code I used for my simple USART example program.
Somewhere in the compiler routine for USART there's probably the copy of the FIFO contents in variables located in the bank 2 GPR.
I'll check, but naturally it makes sense.

Many thanks for your kind clarification and help.

Regards.

[Ettore]

Yep absolutely, Proton Basic is the nut! Any Basic instruction is often made as a bunch of assembly code, so it seems reasonable to me that async serial commands create some sort of buffering in the data memory at GPR data block.

[picchiedi]

Ettore, I think I was wrong.
Checking the Proton code there's no assignment of the FIFO values to those addresses (or to a variable) in Internal Model Data.
Furthermore as you can see enclosed, also in equivalent pure assembly code (not Proton) I have in C9 and CA the FIFO buffer values assigned.

So my feeling is that these assignments in Internal Model Data are made by Proteus itself.

Can you suggest to me where I can have some clarification of what Internal Model Data table is for, during debug, and the meaning of its addresses?
I didn't find it in the Help.

Thank you

Regards.

[Ettore]

...Furthermore as you can see enclosed, also in equivalent pure assembly code (not Proton) I have in C9 and CA the FIFO buffer values assigned.

With the project you attached I didn't get any value to 0xC9 and 0xCA; they are unused to 0x00, as I was expecting by the assembly code. A screen shot is shown below.

...Can you suggest to me where I can have some clarification of what Internal Model Data table is for, during debug, ...

If you go three posts above you'll find "PIC16F876A/877A REGISTER FILE MAP". As I said already, the Data Memory is the exact copy of such the file map.

and the meaning of its addresses?

Find it in to the datasheet, chapter 2.0 Memory Organization.

2022-05-16 115823.jpg (402.8 KiB) Viewed 9466 times

[picchiedi]

Thank you, Ettore.

As far as I understand at the moment being , 8. CPU/Internal Model Data (that is not Data Memory) is only a possible choice, and visualisation, during debug in Proteus Demonstration version (I have Demo version "8.8"). I was confused because it has the same addresses of Data Memory...

Perhaps it's only a tool used in Demo versions to run all projects...don't know.

Thanks a lot for your help, I'll stop to be tedious with my silly doubts.

Regards

[Ettore]

Are you still on 7.xx ? I'm not sure why do you see the item 8 in the PIC CPU list in Debug window.

In the latest Proteus version, and as far as I know, you can see the "Internal Model Data" only if you set a Watch window. If you open a watch window and then you right click over it, then you can select the item "Add Item (By Name)...". In the list Memory select "PIC CPU\Internal Model Data" to choose this debug tool.

In the list of Watchable Items you should find out the relevant internal information - which are not at all or only partially supported by the Data Memory window". In this list, yes, you should find "USART Tx State" and "USART Rx State". Is this what you were talking of ?
The other items meaning are self explaining by their name. However, double click to each item you want to be placed in the Watch Window.

Some addresses showed in the watch windows - as FIFO or Busy flags etc are just a dummy one - as they have no any relevance which the PIC CPU - as I said USART FIFOs are not mapped physically in to the Data Memory.

I think this should shed some more light about the matter and should partially explain the misunderstanding about Data Memory and Internal Data Model. Just note as the PIC CPU\Internal Model Data is relatively old debugging tool - I think is was there from Proteus 5.0. It has been superseded by the Debugging Diagnostic Message system.

[picchiedi]

That's clear, Ettore.

I normally use a professional licence 8.3 starter kit and sometimes, to see all potentiality, the Demo version 8.8 (an example that shows the Internal model data window I talked about is enclosed).
It is there that I saw the FIFO value during debug.

But now it's clear, I'll use the Watch window as you taght me.

Many thanks

Regards