ATMEGA2560 simulation bugs

[Reopold]

When debugging atmega2560, I found several bugs:

1. In timer mode 12 (TIMER1, CTC, TOP=ICR1), an interrupt on the ICF1 flag is not triggered when TOP is reached. Interruption not occurs. I didn't check other timers, maybe the same thing.

2. When writing to the OCR5B, OCR5C, OCR4B, OCR4C registers, 0 is always written to the 7th bit of the lowest byte.

OCR errors.png (31.72 KiB) Viewed 2654 times

3. The condition from the datasheet is not met: "All CPU writes to the TCNTn Register will block any compare match that occurs in the next timer clock cycle, even when the timer is stopped."
Comparison and, accordingly, interruption still occurs.

All these bugs are only in Proteus, everything works fine in hardware.

[David]

Hi,

Please can you send your project and a link to this thread to support@labcenter.com so we can take a look? Thanks

Regards,
Dave.

[Reopold]

I sent an email with projects to support@labcenter.com.
I also attach a file with projects here so that anyone can test.

I would also like to clarify this issue:
3. The condition from the datasheet is not met: "All CPU writes to the TCNTn Register will block any compare match that occurs in the next timer clock cycle, even when the timer is stopped."

avr issue 3.png (70.41 KiB) Viewed 2579 times

[Ettore]

I hate to tell it but you are using an illegal copy of the software.
Please purchase a licence from https://www.labcenter.com/pricing/comm/