Labcenter Community Support Forums

The defaults are configured on the system menu -> set selection filter dialogue. This is where you can choose what is 'selectable' in different modes.

For now at least, I'd uncheck graphics from any 'in-use' modes.

Iain.

You can export STEP (both AP203 and AP214) or IGES directly from Proteus. Uses the 'Generate 3D MCAD File command' on the output menu in the PCB layout module.

Can you send one of the projects please to support @ labcenter.com so we can take a look.

Thanks.

Just a short note on Coronavirus. First of all let me pass on best wishes for everyone during the crisis. Secondly, in terms of Labcenter support and sales there shouldn't be any disruption. Labcenter staff are all safely working from home and sales, support and development on v8.11 are all continui...

Hi Steve, Nothing to be done with the demo version. There's two options you might have: 1) Student version. This will need an LXK file to be installed and the student version of the software. 2) Cloud server license. This would be the college using one of the emergency cloud license servers we're tr...

I think we've run into feature mesh. This information was requested and added to aid component placement/orientation. I don't think it's optional because it didn't seem obtrusive. If you're able can you mail us in an example pdsprj (or part of) and I'll log a request to make them optional. support @...

I would place a small design rule room around the fiducial area and then set the pad->trace rule in the corresponding design rule.

You can also do it by setting the fitted status on different assembly variants.

It is very likely that Proteus 9 will support Unicode but that is some distance away from release.

You should either : - Edit the pad style and reduce the solder resist clearance if it is needlessly large. - Move the offending object(s) so that there is no violation. You can't turn off the check itself without disabling the DRC system. Definitely not a good idea. However you could - Right click o...

First, you set up your layer stack (technology menu) and specify drill ranges if you want vias that don't travel through then entire board. Then you can either : Press SPACE bar when routing to float a via on the end of the route and use PGUP/PGDOWN to switch through valid destination layers - click...

You can remove the pin connection to the plane by editing the pin, setting to thermal relief and then specifying the relief style to be none. You can isolate the track from the zone either by setting exclude tracking or by way of placing an empty zone around the track. If you want to connect two dif...

You can create an opening in the solder mask by drawing a 2D graphics object of the correct shape on the appropriate resist layer and then setting the fill type of the graphic to be solid.

I understand that this is now resolved - problem reported as relating to MS One Drive permissions.

What you use here depends on the construction of the circuitry on the schematic (most importantly, whether it is all on a single sheet) and also on whether or not you are likely to re-use on future designs. There are two options: - Project Clips - Managed Replicate. Project clips are best for single...